Overlooked microarchitectural capabilities
Reduced instruction set RISC is a legend in the history of computer chips. Its most proud work is that in 1983, British Acorn Company launched the Acorn RISC Machine (ARM), a new processor architecture research and development project based on the RISC project concept of the University of California, Berkeley, which is the beginning of the ARM architecture that dominates mobile chips today. Berkeley's RISC project grew through four generations in the 1980s and launched its fifth generation, RISC-V, in 2010.
RISC-V is an instruction set, not a processor implementation. The instruction set is a standard specification, a convention for everyone. Software and hardware from different manufacturers can work together if they follow the same standard specification, just like the size specifications for screws and nuts.
With the instruction set standard specification, the next most important step is chip design. According to the instruction set to complete the design of the microarchitecture, form a document, and then through engineering development to form the source code. With the source code, EDA software can be used to form a chip layout, and finally handed over to Taiwan Semiconductor Manufacturing or Semiconductor Manufacturing International, such as the foundry to remove the chip, the realization of chip manufacturing.
While many people focus on the equipment being built or the software being designed, it's easy to quietly overlook the "design and implementation of microarchitecture." In fact, this is a very important capability, is the core competence of chip design.
When you have microarchitecture design and implementation capabilities, you are no longer constrained by instruction sets. If you want to change one instruction set, it will be very easy. Intel's processors have improved over the past few decades. Why? The addition of instruction sets is a visible accumulation, but more important is the continuous evolution of Intel's processor microarchitecture and processes. Starting with Intel's P6 architecture in 1995, through 2000 and 2006, there has been an evolution of a generation of architecture roughly every five years. Optimization at the microarchitecture level is achieved in the iterative process. This is the core of Intel's design capabilities. Even from this point of view, the instruction set is not that important in a way because it is just a standard specification. It is the design and implementation capability of the microarchitecture that really determines the performance, power consumption and area of a chip.
Apple has changed instruction sets over the decades, from MOTOROLA to Intel to PowerPC to today's ARM. Due to Apple's own strong vertical co-design capabilities, changing instruction sets isn't too difficult. Due to its strong chip design capability, domestic Loongson companies hardly need to make too many changes in microarchitecture design when they change from MIPS instruction set to their own longArch instruction set. There are some domestic enterprises that can support the design of Arm and RISC-V at the same time. It is also because the underlying microarchitecture design does not need major changes to support different instruction sets.
Instruction sets and ecology
Doesn't the instruction set matter anymore? In terms of software ecology, it is critical. It will determine the efficiency of software ecological development. In the early days of IBM computers, each machine's instruction set was independent, resulting in a huge investment in software. IBM's System/360 computer in 1964 changed the landscape, creating a unified instruction set so that computer software and hardware could be separated. This time the standardized instruction set to spread, gradually making independent software industries possible. A unified instruction set, while less important to the role of a single company than architectural capabilities, is a decisive influence on the software ecology.
However, for the past few decades, instruction sets have been proprietary to companies such as X86, ARM, MIPS, SPARC, and so on. In 2010, David Patterson, a professor at the University of California, Berkeley, came up with the resounding slogan "Instruction sets should be free," an idea that was immediately recognized around the world. Berkeley's RISC-V is booming. Since the instruction set is no longer owned by a single company, the whole world can build it. A whole new ecosystem of open-source, open and shared processors has emerged. The core of the co-construction mode is to separate the standard specification from the product realization. This is very similar to the construction mechanism of 5G communication standards in the field of communications. The 5G standard is formulated by 3GPP, a non-profit organization, and enterprises can make their own products according to the 5G standard and compete in an open mode.
Similarly, RISC-V opens up such a new opportunity. The standard for the instruction set is developed by the RISC-V International Foundation. Based on this standard, different enterprises in different countries can develop different RISC-V products. For example, RISC-V products of Sifive, a new company in Silicon Valley in the United States, Bastiel RISC-V processors of Ali Pingtou Brother in China, and Xiangshan processors developed by the Chinese Academy of Sciences. This has brought a new mode, that is, "5G mode development chip", to the processor manufacturers after entering the circuit.
In the past 20 years, the main development modes of domestic processors are "high-speed rail mode" and "Beidou mode". The high-speed rail model represents an idea that integrates into the existing ecology and realizes product upgrading through the introduction - digestion - absorption - re-innovation. It represents enterprises such as Haiguang, Haisei and Feiteng. The Beidou model is to build the technical system and ecology independently, represented by Longson and Sunway. And "5G mode" means that Chinese processors can adopt the third mode, develop open standards, self-develop core technologies, compete and cooperate in an open framework, and face the international market and ecological construction.
Reunderstanding of RISC-V
Despite the significance of RISC-V, there are still many misconceptions in the industry. In December 2022, Professor David Patterson wrote an article dedicated to correcting some of the fallacies about RISC-V.
The first misconception is that RISC-V is an open-source processor, just like Linux is an open-source operating system. In fact, RISC-V is not an open-source processor, it is a standard specification, essentially a descriptive manual, similar to the Ethernet standard, USB standard, etc. The Linux operating system is a source code. So the two are not comparable. RISC-V is standard, and the International Foundation is sort of a working group that develops standards and specifications.
The second myth is that maturing a closed instruction set is safer than choosing an open one. Security has nothing to do with closed and open source. The closed instruction set belongs to the company and is bound to the fate of the company. If the company is sluggish, the company's instruction set will disappear and supply chain security will not be guaranteed. There are many examples of lost instructions in history, including the once-popular DEC VAX and DEC Alpha instruction sets. Also, a closed instruction set may not be stable. MIPS was sold to six companies, ARM had three owners, and changing one owner could mean a change in the business model.
The third myth is that closed instruction sets are neat and unfragmented. In fact, closed instruction sets often encounter unforeseen incompatibilities during their life cycle. Even under one ARM architecture, incompatibilities have occurred. ARMv1 to ARMv7 use a 32-bit address space, whereas the next generation of ARMv8-a, which can provide both 32-bit and 64-bit address versions, is not compatible. Moreover, even with the same generation, ARMv8-a and ARMv8-m are incompatible. Fragmentation, to some extent, is the norm.
The fourth misconception is that the modularity of RISC-V leads to a more fragmented software ecosystem than a closed instruction set. In this regard, the RISC-V Technical Working Group has been providing new mechanisms, such as the Profile mechanism, to regulate the software ecosystem so that software is not as fragmented as expected.
A final fallacy, many people assert that RISC-V is unlikely to become a mainstream instruction set. That is premature. Technically speaking, RISC-V can support from embedded, to ordinary computers, all the way to the supercomputer field, there is no systemic defect. From a business perspective, more open standards tend to be more viable. This is comparable to the success of the Linux operating system.
Five trends in RISC-V
RISC-V is already moving into high-performance territory. In the past, many people believed that it could only be used in the embedded field. However, in recent years, a batch of high-performance RISC-V processors have emerged, representing enterprises such as SiFive and Ventana in Silicon Valley, which have certain advantages in technology.
There are also Xiangshan processors in China and Shanghai Saifang. SiFive recently launched up to 3.4GHz RISC-V processor, performance comparable to the ARM A78, is a very high-performance processor. In terms of research and development progress, this design is about one year ahead of Xiangshan in China. However, Xiangshan also has its advantages, because Xiangshan combines multiple enterprises to conduct research and development through an open-source model, which enables faster iteration and reduces costs through sharing.
It is worth noting that many countries are actively promoting or supporting RISC-V at the national level. For example, in June 2022, the Russian Ministry of Digital Development announced that it would strongly support the development of RISC-V processors. India has also launched the Digital India RISC-V Processor (DIR-V) Development Plan.
At the same time, India's Ministry of Electronics and Information (the domestic equivalent of the Ministry of Industry and Information) has joined the RISC-V International Foundation as a senior member under the ministry's name. In addition, on 8 September 2022, the EU issued a report entitled "Recommendations and Roadmap for the establishment of European Open Source Hardware, Software and RISC-V technology Sovereignty", which supports RISC-V and open source hardware. In particular, it gives the nine key development priorities and the implementation path, including the establishment of non-profit institutions to support research and development, the implementation of education policies and measures. It can be seen that the whole world is actively investing in RISC-V ecological construction.
The critical software ecosystem of RISC-V is also evolving very rapidly. On the one hand, RISC-V International Foundation is actively promoting the adaptation of basic software; On the other hand, many open-source software communities are also adapting. This allows software forces around the world to support the RISC-V ecosystem. In the case of the Linux distribution Debian, the open-source community began supporting RISC-V in 2019. Thanks to the efforts of the open source community around the world, 95% of the 20,000 + packages were ported in just 3 years, making RISC-V the Tier-1 architecture supported by Debian. In RISC-V ecological construction, China is in the first echelon. Especially since 2018, many enterprises are launching a variety of RISC-V-based chip products. At the same time, the local government also introduced a series of policies. The Beijing government, in particular, has invested heavily in RISC-V.
As the RISC-V software ecosystem also accelerates, RISC-V is gaining support from more and more enterprises. In addition to startups, giants like Intel are also actively investing in the RISC-V ecosystem. American companies have invested heavily in the field of high-performance processors and are generally in a leading position. But at home, startups are active and far more numerous than in the United States. For now, though, it's mostly focused on the MCU level. But this for the European, American, and Japanese monopolistic market, injected a bit of fresh air.
Overall, RISC-V applications are growing rapidly around the world. In the first half of 2022, more than 10 billion RISC-Vs were shipped, and it is expected to exceed 80 billion by 2025, according to the RISC-V International Foundation. In general, RISC-V still lacks some landmark, benchmarking RISC-V applications. But the good news is that the European Union plans to spend 270 million euros on a supercomputer, which will be a milestone.
Lighter and Broader: The fourth-generation chip business model
The question that a lot of people are focusing on is: Do open source chips have a future?
On this question, we can draw some inspiration from history. IBM introduced the personal computer in 1981 and made all documentation public. The nearly 400-page document that IBM made public can still be found online. This document contains all the source code, circuit diagrams, and various register configurations. This was a shocking move in the highly competitive and incompatible personal computer market.
It had two profound effects. The first was the birth of a number of new companies, such as Dell and Compaq, as well as the domestic Lenovo and Great Wall. Dell and Lenovo were both founded in 1984 and are still the world's three biggest players (along with the old HP). As a result of lowering the threshold of personal computer design, many enterprises can enter the field of personal computers to find a new space for enterprise development. The second effect was that the price and cost of PC dropped dramatically. A PC used to cost nearly $10,000, but because of IBM's open source, the price of a PC dropped to $1,500, which enabled PC to enter every household and created a new PC market.
Open-source chips have the same potential to energize a much larger industry, the emerging Internet of Things industry, where "people, machines and things" converge. It's going to be bigger because everything is connected and people are connected everywhere, whether it's smart homes or connected cars. So in the past decades, faced with different industries, and different chip companies how to support? An interesting phenomenon is that the more open the business model, the fewer resources it requires, but the larger the industry it leverages.
Intel's mode is "IDM mode + sales chip", enterprises can only take Intel chips to do the whole machine. This model can be regarded as an asset-heavy model, so Intel needs to have more than 50 billion dollars of turnover, and tens of billions of dollars of profits to support the PC industry. Nvidia's model, which started with image GPU, is lighter than Intel's model and adopts the "Fabless model of chip design without manufacturing + chip sales" model. It only needs more than 15 billion dollars in turnover and 3 billion dollars in profit to support the development of the artificial intelligence industry. The third generation model is ARM, a British company, which is much lighter. It has adopted a "Fabless+IP licensing" approach, which only makes IP and lets other enterprises make chips. So ARM, with revenues of $2 billion and profits of $300 million, could dominate the smartphone industry.
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